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00040 #ifndef __X86EMU_REGS_H
00041 #define __X86EMU_REGS_H
00042
00043
00044
00045 #pragma pack(1)
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00061
00062 #ifdef __BIG_ENDIAN__
00063
00064 typedef struct {
00065 u32 e_reg;
00066 } I32_reg_t;
00067
00068 typedef struct {
00069 u16 filler0, x_reg;
00070 } I16_reg_t;
00071
00072 typedef struct {
00073 u8 filler0, filler1, h_reg, l_reg;
00074 } I8_reg_t;
00075
00076 #else
00077
00078 typedef struct {
00079 u32 e_reg;
00080 } I32_reg_t;
00081
00082 typedef struct {
00083 u16 x_reg;
00084 } I16_reg_t;
00085
00086 typedef struct {
00087 u8 l_reg, h_reg;
00088 } I8_reg_t;
00089
00090 #endif
00091
00092 typedef union {
00093 I32_reg_t I32_reg;
00094 I16_reg_t I16_reg;
00095 I8_reg_t I8_reg;
00096 } i386_general_register;
00097
00098 struct i386_general_regs {
00099 i386_general_register A, B, C, D;
00100 };
00101
00102 typedef struct i386_general_regs Gen_reg_t;
00103
00104 struct i386_special_regs {
00105 i386_general_register SP, BP, SI, DI, IP;
00106 u32 FLAGS;
00107 };
00108
00109
00110
00111
00112
00113
00114 struct i386_segment_regs {
00115 u16 CS, DS, SS, ES, FS, GS;
00116 };
00117
00118
00119 #define R_AH gen.A.I8_reg.h_reg
00120 #define R_AL gen.A.I8_reg.l_reg
00121 #define R_BH gen.B.I8_reg.h_reg
00122 #define R_BL gen.B.I8_reg.l_reg
00123 #define R_CH gen.C.I8_reg.h_reg
00124 #define R_CL gen.C.I8_reg.l_reg
00125 #define R_DH gen.D.I8_reg.h_reg
00126 #define R_DL gen.D.I8_reg.l_reg
00127
00128
00129 #define R_AX gen.A.I16_reg.x_reg
00130 #define R_BX gen.B.I16_reg.x_reg
00131 #define R_CX gen.C.I16_reg.x_reg
00132 #define R_DX gen.D.I16_reg.x_reg
00133
00134
00135 #define R_EAX gen.A.I32_reg.e_reg
00136 #define R_EBX gen.B.I32_reg.e_reg
00137 #define R_ECX gen.C.I32_reg.e_reg
00138 #define R_EDX gen.D.I32_reg.e_reg
00139
00140
00141 #define R_SP spc.SP.I16_reg.x_reg
00142 #define R_BP spc.BP.I16_reg.x_reg
00143 #define R_SI spc.SI.I16_reg.x_reg
00144 #define R_DI spc.DI.I16_reg.x_reg
00145 #define R_IP spc.IP.I16_reg.x_reg
00146 #define R_FLG spc.FLAGS
00147
00148
00149 #define R_SP spc.SP.I16_reg.x_reg
00150 #define R_BP spc.BP.I16_reg.x_reg
00151 #define R_SI spc.SI.I16_reg.x_reg
00152 #define R_DI spc.DI.I16_reg.x_reg
00153 #define R_IP spc.IP.I16_reg.x_reg
00154 #define R_FLG spc.FLAGS
00155
00156
00157 #define R_ESP spc.SP.I32_reg.e_reg
00158 #define R_EBP spc.BP.I32_reg.e_reg
00159 #define R_ESI spc.SI.I32_reg.e_reg
00160 #define R_EDI spc.DI.I32_reg.e_reg
00161 #define R_EIP spc.IP.I32_reg.e_reg
00162 #define R_EFLG spc.FLAGS
00163
00164
00165 #define R_CS seg.CS
00166 #define R_DS seg.DS
00167 #define R_SS seg.SS
00168 #define R_ES seg.ES
00169 #define R_FS seg.FS
00170 #define R_GS seg.GS
00171
00172
00173 #define FB_CF 0x0001
00174 #define FB_PF 0x0004
00175 #define FB_AF 0x0010
00176 #define FB_ZF 0x0040
00177 #define FB_SF 0x0080
00178 #define FB_TF 0x0100
00179 #define FB_IF 0x0200
00180 #define FB_DF 0x0400
00181 #define FB_OF 0x0800
00182
00183
00184 #define F_ALWAYS_ON (0x0002)
00185
00186
00187
00188
00189
00190 #define F_MSK (FB_CF|FB_PF|FB_AF|FB_ZF|FB_SF|FB_TF|FB_IF|FB_DF|FB_OF)
00191
00192
00193
00194 #define F_CF 0x0001
00195 #define F_PF 0x0004
00196 #define F_AF 0x0010
00197 #define F_ZF 0x0040
00198 #define F_SF 0x0080
00199 #define F_TF 0x0100
00200 #define F_IF 0x0200
00201 #define F_DF 0x0400
00202 #define F_OF 0x0800
00203
00204 #define TOGGLE_FLAG(flag) (M.x86.R_FLG ^= (flag))
00205 #define SET_FLAG(flag) (M.x86.R_FLG |= (flag))
00206 #define CLEAR_FLAG(flag) (M.x86.R_FLG &= ~(flag))
00207 #define ACCESS_FLAG(flag) (M.x86.R_FLG & (flag))
00208 #define CLEARALL_FLAG(m) (M.x86.R_FLG = 0)
00209
00210 #define CONDITIONAL_SET_FLAG(COND,FLAG) \
00211 if (COND) SET_FLAG(FLAG); else CLEAR_FLAG(FLAG)
00212
00213 #define F_PF_CALC 0x010000
00214 #define F_ZF_CALC 0x020000
00215 #define F_SF_CALC 0x040000
00216
00217 #define F_ALL_CALC 0xff0000
00218
00219
00220
00221
00222
00223 #define SYSMODE_SEG_DS_SS 0x00000001
00224 #define SYSMODE_SEGOVR_CS 0x00000002
00225 #define SYSMODE_SEGOVR_DS 0x00000004
00226 #define SYSMODE_SEGOVR_ES 0x00000008
00227 #define SYSMODE_SEGOVR_FS 0x00000010
00228 #define SYSMODE_SEGOVR_GS 0x00000020
00229 #define SYSMODE_SEGOVR_SS 0x00000040
00230 #define SYSMODE_PREFIX_REPE 0x00000080
00231 #define SYSMODE_PREFIX_REPNE 0x00000100
00232 #define SYSMODE_PREFIX_DATA 0x00000200
00233 #define SYSMODE_PREFIX_ADDR 0x00000400
00234 #define SYSMODE_INTR_PENDING 0x10000000
00235 #define SYSMODE_EXTRN_INTR 0x20000000
00236 #define SYSMODE_HALTED 0x40000000
00237
00238 #define SYSMODE_SEGMASK (SYSMODE_SEG_DS_SS | \
00239 SYSMODE_SEGOVR_CS | \
00240 SYSMODE_SEGOVR_DS | \
00241 SYSMODE_SEGOVR_ES | \
00242 SYSMODE_SEGOVR_FS | \
00243 SYSMODE_SEGOVR_GS | \
00244 SYSMODE_SEGOVR_SS)
00245 #define SYSMODE_CLRMASK (SYSMODE_SEG_DS_SS | \
00246 SYSMODE_SEGOVR_CS | \
00247 SYSMODE_SEGOVR_DS | \
00248 SYSMODE_SEGOVR_ES | \
00249 SYSMODE_SEGOVR_FS | \
00250 SYSMODE_SEGOVR_GS | \
00251 SYSMODE_SEGOVR_SS | \
00252 SYSMODE_PREFIX_DATA | \
00253 SYSMODE_PREFIX_ADDR)
00254
00255 #define INTR_SYNCH 0x1
00256 #define INTR_ASYNCH 0x2
00257 #define INTR_HALTED 0x4
00258
00259 typedef struct {
00260 struct i386_general_regs gen;
00261 struct i386_special_regs spc;
00262 struct i386_segment_regs seg;
00263
00264
00265
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00267
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00269
00270
00271
00272
00273
00274
00275 u32 mode;
00276 volatile int intr;
00277 int debug;
00278 #ifdef DEBUG
00279 int check;
00280 u16 saved_ip;
00281 u16 saved_cs;
00282 int enc_pos;
00283 int enc_str_pos;
00284 char decode_buf[32];
00285 char decoded_buf[256];
00286 #endif
00287 u8 intno;
00288 u8 __pad[3];
00289 } X86EMU_regs;
00290
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00299
00300
00301 typedef struct {
00302 unsigned long mem_base;
00303 unsigned long mem_size;
00304 void* private;
00305 X86EMU_regs x86;
00306 } X86EMU_sysEnv;
00307
00308 #pragma pack()
00309
00310
00311
00312
00313
00314
00315
00316
00317 extern X86EMU_sysEnv _X86EMU_env;
00318 #define M _X86EMU_env
00319
00320
00321
00322
00323
00324 void printk(const char *fmt, ...);
00325
00326 #endif