Libav 0.7.1
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00001 /* 00002 * MMX optimized motion estimation 00003 * Copyright (c) 2001 Fabrice Bellard 00004 * Copyright (c) 2002-2004 Michael Niedermayer 00005 * 00006 * mostly by Michael Niedermayer <michaelni@gmx.at> 00007 * 00008 * This file is part of Libav. 00009 * 00010 * Libav is free software; you can redistribute it and/or 00011 * modify it under the terms of the GNU Lesser General Public 00012 * License as published by the Free Software Foundation; either 00013 * version 2.1 of the License, or (at your option) any later version. 00014 * 00015 * Libav is distributed in the hope that it will be useful, 00016 * but WITHOUT ANY WARRANTY; without even the implied warranty of 00017 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 00018 * Lesser General Public License for more details. 00019 * 00020 * You should have received a copy of the GNU Lesser General Public 00021 * License along with Libav; if not, write to the Free Software 00022 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA 00023 */ 00024 00025 #include "libavutil/x86_cpu.h" 00026 #include "libavcodec/dsputil.h" 00027 #include "dsputil_mmx.h" 00028 00029 DECLARE_ASM_CONST(8, uint64_t, round_tab)[3]={ 00030 0x0000000000000000ULL, 00031 0x0001000100010001ULL, 00032 0x0002000200020002ULL, 00033 }; 00034 00035 DECLARE_ASM_CONST(8, uint64_t, bone)= 0x0101010101010101LL; 00036 00037 static inline void sad8_1_mmx(uint8_t *blk1, uint8_t *blk2, int stride, int h) 00038 { 00039 x86_reg len= -(stride*h); 00040 __asm__ volatile( 00041 ".p2align 4 \n\t" 00042 "1: \n\t" 00043 "movq (%1, %%"REG_a"), %%mm0 \n\t" 00044 "movq (%2, %%"REG_a"), %%mm2 \n\t" 00045 "movq (%2, %%"REG_a"), %%mm4 \n\t" 00046 "add %3, %%"REG_a" \n\t" 00047 "psubusb %%mm0, %%mm2 \n\t" 00048 "psubusb %%mm4, %%mm0 \n\t" 00049 "movq (%1, %%"REG_a"), %%mm1 \n\t" 00050 "movq (%2, %%"REG_a"), %%mm3 \n\t" 00051 "movq (%2, %%"REG_a"), %%mm5 \n\t" 00052 "psubusb %%mm1, %%mm3 \n\t" 00053 "psubusb %%mm5, %%mm1 \n\t" 00054 "por %%mm2, %%mm0 \n\t" 00055 "por %%mm1, %%mm3 \n\t" 00056 "movq %%mm0, %%mm1 \n\t" 00057 "movq %%mm3, %%mm2 \n\t" 00058 "punpcklbw %%mm7, %%mm0 \n\t" 00059 "punpckhbw %%mm7, %%mm1 \n\t" 00060 "punpcklbw %%mm7, %%mm3 \n\t" 00061 "punpckhbw %%mm7, %%mm2 \n\t" 00062 "paddw %%mm1, %%mm0 \n\t" 00063 "paddw %%mm3, %%mm2 \n\t" 00064 "paddw %%mm2, %%mm0 \n\t" 00065 "paddw %%mm0, %%mm6 \n\t" 00066 "add %3, %%"REG_a" \n\t" 00067 " js 1b \n\t" 00068 : "+a" (len) 00069 : "r" (blk1 - len), "r" (blk2 - len), "r" ((x86_reg)stride) 00070 ); 00071 } 00072 00073 static inline void sad8_1_mmx2(uint8_t *blk1, uint8_t *blk2, int stride, int h) 00074 { 00075 __asm__ volatile( 00076 ".p2align 4 \n\t" 00077 "1: \n\t" 00078 "movq (%1), %%mm0 \n\t" 00079 "movq (%1, %3), %%mm1 \n\t" 00080 "psadbw (%2), %%mm0 \n\t" 00081 "psadbw (%2, %3), %%mm1 \n\t" 00082 "paddw %%mm0, %%mm6 \n\t" 00083 "paddw %%mm1, %%mm6 \n\t" 00084 "lea (%1,%3,2), %1 \n\t" 00085 "lea (%2,%3,2), %2 \n\t" 00086 "sub $2, %0 \n\t" 00087 " jg 1b \n\t" 00088 : "+r" (h), "+r" (blk1), "+r" (blk2) 00089 : "r" ((x86_reg)stride) 00090 ); 00091 } 00092 00093 static int sad16_sse2(void *v, uint8_t *blk2, uint8_t *blk1, int stride, int h) 00094 { 00095 int ret; 00096 __asm__ volatile( 00097 "pxor %%xmm2, %%xmm2 \n\t" 00098 ".p2align 4 \n\t" 00099 "1: \n\t" 00100 "movdqu (%1), %%xmm0 \n\t" 00101 "movdqu (%1, %4), %%xmm1 \n\t" 00102 "psadbw (%2), %%xmm0 \n\t" 00103 "psadbw (%2, %4), %%xmm1 \n\t" 00104 "paddw %%xmm0, %%xmm2 \n\t" 00105 "paddw %%xmm1, %%xmm2 \n\t" 00106 "lea (%1,%4,2), %1 \n\t" 00107 "lea (%2,%4,2), %2 \n\t" 00108 "sub $2, %0 \n\t" 00109 " jg 1b \n\t" 00110 "movhlps %%xmm2, %%xmm0 \n\t" 00111 "paddw %%xmm0, %%xmm2 \n\t" 00112 "movd %%xmm2, %3 \n\t" 00113 : "+r" (h), "+r" (blk1), "+r" (blk2), "=r"(ret) 00114 : "r" ((x86_reg)stride) 00115 ); 00116 return ret; 00117 } 00118 00119 static inline void sad8_x2a_mmx2(uint8_t *blk1, uint8_t *blk2, int stride, int h) 00120 { 00121 __asm__ volatile( 00122 ".p2align 4 \n\t" 00123 "1: \n\t" 00124 "movq (%1), %%mm0 \n\t" 00125 "movq (%1, %3), %%mm1 \n\t" 00126 "pavgb 1(%1), %%mm0 \n\t" 00127 "pavgb 1(%1, %3), %%mm1 \n\t" 00128 "psadbw (%2), %%mm0 \n\t" 00129 "psadbw (%2, %3), %%mm1 \n\t" 00130 "paddw %%mm0, %%mm6 \n\t" 00131 "paddw %%mm1, %%mm6 \n\t" 00132 "lea (%1,%3,2), %1 \n\t" 00133 "lea (%2,%3,2), %2 \n\t" 00134 "sub $2, %0 \n\t" 00135 " jg 1b \n\t" 00136 : "+r" (h), "+r" (blk1), "+r" (blk2) 00137 : "r" ((x86_reg)stride) 00138 ); 00139 } 00140 00141 static inline void sad8_y2a_mmx2(uint8_t *blk1, uint8_t *blk2, int stride, int h) 00142 { 00143 __asm__ volatile( 00144 "movq (%1), %%mm0 \n\t" 00145 "add %3, %1 \n\t" 00146 ".p2align 4 \n\t" 00147 "1: \n\t" 00148 "movq (%1), %%mm1 \n\t" 00149 "movq (%1, %3), %%mm2 \n\t" 00150 "pavgb %%mm1, %%mm0 \n\t" 00151 "pavgb %%mm2, %%mm1 \n\t" 00152 "psadbw (%2), %%mm0 \n\t" 00153 "psadbw (%2, %3), %%mm1 \n\t" 00154 "paddw %%mm0, %%mm6 \n\t" 00155 "paddw %%mm1, %%mm6 \n\t" 00156 "movq %%mm2, %%mm0 \n\t" 00157 "lea (%1,%3,2), %1 \n\t" 00158 "lea (%2,%3,2), %2 \n\t" 00159 "sub $2, %0 \n\t" 00160 " jg 1b \n\t" 00161 : "+r" (h), "+r" (blk1), "+r" (blk2) 00162 : "r" ((x86_reg)stride) 00163 ); 00164 } 00165 00166 static inline void sad8_4_mmx2(uint8_t *blk1, uint8_t *blk2, int stride, int h) 00167 { 00168 __asm__ volatile( 00169 "movq "MANGLE(bone)", %%mm5 \n\t" 00170 "movq (%1), %%mm0 \n\t" 00171 "pavgb 1(%1), %%mm0 \n\t" 00172 "add %3, %1 \n\t" 00173 ".p2align 4 \n\t" 00174 "1: \n\t" 00175 "movq (%1), %%mm1 \n\t" 00176 "movq (%1,%3), %%mm2 \n\t" 00177 "pavgb 1(%1), %%mm1 \n\t" 00178 "pavgb 1(%1,%3), %%mm2 \n\t" 00179 "psubusb %%mm5, %%mm1 \n\t" 00180 "pavgb %%mm1, %%mm0 \n\t" 00181 "pavgb %%mm2, %%mm1 \n\t" 00182 "psadbw (%2), %%mm0 \n\t" 00183 "psadbw (%2,%3), %%mm1 \n\t" 00184 "paddw %%mm0, %%mm6 \n\t" 00185 "paddw %%mm1, %%mm6 \n\t" 00186 "movq %%mm2, %%mm0 \n\t" 00187 "lea (%1,%3,2), %1 \n\t" 00188 "lea (%2,%3,2), %2 \n\t" 00189 "sub $2, %0 \n\t" 00190 " jg 1b \n\t" 00191 : "+r" (h), "+r" (blk1), "+r" (blk2) 00192 : "r" ((x86_reg)stride) 00193 ); 00194 } 00195 00196 static inline void sad8_2_mmx(uint8_t *blk1a, uint8_t *blk1b, uint8_t *blk2, int stride, int h) 00197 { 00198 x86_reg len= -(stride*h); 00199 __asm__ volatile( 00200 ".p2align 4 \n\t" 00201 "1: \n\t" 00202 "movq (%1, %%"REG_a"), %%mm0 \n\t" 00203 "movq (%2, %%"REG_a"), %%mm1 \n\t" 00204 "movq (%1, %%"REG_a"), %%mm2 \n\t" 00205 "movq (%2, %%"REG_a"), %%mm3 \n\t" 00206 "punpcklbw %%mm7, %%mm0 \n\t" 00207 "punpcklbw %%mm7, %%mm1 \n\t" 00208 "punpckhbw %%mm7, %%mm2 \n\t" 00209 "punpckhbw %%mm7, %%mm3 \n\t" 00210 "paddw %%mm0, %%mm1 \n\t" 00211 "paddw %%mm2, %%mm3 \n\t" 00212 "movq (%3, %%"REG_a"), %%mm4 \n\t" 00213 "movq (%3, %%"REG_a"), %%mm2 \n\t" 00214 "paddw %%mm5, %%mm1 \n\t" 00215 "paddw %%mm5, %%mm3 \n\t" 00216 "psrlw $1, %%mm1 \n\t" 00217 "psrlw $1, %%mm3 \n\t" 00218 "packuswb %%mm3, %%mm1 \n\t" 00219 "psubusb %%mm1, %%mm4 \n\t" 00220 "psubusb %%mm2, %%mm1 \n\t" 00221 "por %%mm4, %%mm1 \n\t" 00222 "movq %%mm1, %%mm0 \n\t" 00223 "punpcklbw %%mm7, %%mm0 \n\t" 00224 "punpckhbw %%mm7, %%mm1 \n\t" 00225 "paddw %%mm1, %%mm0 \n\t" 00226 "paddw %%mm0, %%mm6 \n\t" 00227 "add %4, %%"REG_a" \n\t" 00228 " js 1b \n\t" 00229 : "+a" (len) 00230 : "r" (blk1a - len), "r" (blk1b -len), "r" (blk2 - len), "r" ((x86_reg)stride) 00231 ); 00232 } 00233 00234 static inline void sad8_4_mmx(uint8_t *blk1, uint8_t *blk2, int stride, int h) 00235 { 00236 x86_reg len= -(stride*h); 00237 __asm__ volatile( 00238 "movq (%1, %%"REG_a"), %%mm0 \n\t" 00239 "movq 1(%1, %%"REG_a"), %%mm2 \n\t" 00240 "movq %%mm0, %%mm1 \n\t" 00241 "movq %%mm2, %%mm3 \n\t" 00242 "punpcklbw %%mm7, %%mm0 \n\t" 00243 "punpckhbw %%mm7, %%mm1 \n\t" 00244 "punpcklbw %%mm7, %%mm2 \n\t" 00245 "punpckhbw %%mm7, %%mm3 \n\t" 00246 "paddw %%mm2, %%mm0 \n\t" 00247 "paddw %%mm3, %%mm1 \n\t" 00248 ".p2align 4 \n\t" 00249 "1: \n\t" 00250 "movq (%2, %%"REG_a"), %%mm2 \n\t" 00251 "movq 1(%2, %%"REG_a"), %%mm4 \n\t" 00252 "movq %%mm2, %%mm3 \n\t" 00253 "movq %%mm4, %%mm5 \n\t" 00254 "punpcklbw %%mm7, %%mm2 \n\t" 00255 "punpckhbw %%mm7, %%mm3 \n\t" 00256 "punpcklbw %%mm7, %%mm4 \n\t" 00257 "punpckhbw %%mm7, %%mm5 \n\t" 00258 "paddw %%mm4, %%mm2 \n\t" 00259 "paddw %%mm5, %%mm3 \n\t" 00260 "movq 16+"MANGLE(round_tab)", %%mm5 \n\t" 00261 "paddw %%mm2, %%mm0 \n\t" 00262 "paddw %%mm3, %%mm1 \n\t" 00263 "paddw %%mm5, %%mm0 \n\t" 00264 "paddw %%mm5, %%mm1 \n\t" 00265 "movq (%3, %%"REG_a"), %%mm4 \n\t" 00266 "movq (%3, %%"REG_a"), %%mm5 \n\t" 00267 "psrlw $2, %%mm0 \n\t" 00268 "psrlw $2, %%mm1 \n\t" 00269 "packuswb %%mm1, %%mm0 \n\t" 00270 "psubusb %%mm0, %%mm4 \n\t" 00271 "psubusb %%mm5, %%mm0 \n\t" 00272 "por %%mm4, %%mm0 \n\t" 00273 "movq %%mm0, %%mm4 \n\t" 00274 "punpcklbw %%mm7, %%mm0 \n\t" 00275 "punpckhbw %%mm7, %%mm4 \n\t" 00276 "paddw %%mm0, %%mm6 \n\t" 00277 "paddw %%mm4, %%mm6 \n\t" 00278 "movq %%mm2, %%mm0 \n\t" 00279 "movq %%mm3, %%mm1 \n\t" 00280 "add %4, %%"REG_a" \n\t" 00281 " js 1b \n\t" 00282 : "+a" (len) 00283 : "r" (blk1 - len), "r" (blk1 -len + stride), "r" (blk2 - len), "r" ((x86_reg)stride) 00284 ); 00285 } 00286 00287 static inline int sum_mmx(void) 00288 { 00289 int ret; 00290 __asm__ volatile( 00291 "movq %%mm6, %%mm0 \n\t" 00292 "psrlq $32, %%mm6 \n\t" 00293 "paddw %%mm0, %%mm6 \n\t" 00294 "movq %%mm6, %%mm0 \n\t" 00295 "psrlq $16, %%mm6 \n\t" 00296 "paddw %%mm0, %%mm6 \n\t" 00297 "movd %%mm6, %0 \n\t" 00298 : "=r" (ret) 00299 ); 00300 return ret&0xFFFF; 00301 } 00302 00303 static inline int sum_mmx2(void) 00304 { 00305 int ret; 00306 __asm__ volatile( 00307 "movd %%mm6, %0 \n\t" 00308 : "=r" (ret) 00309 ); 00310 return ret; 00311 } 00312 00313 static inline void sad8_x2a_mmx(uint8_t *blk1, uint8_t *blk2, int stride, int h) 00314 { 00315 sad8_2_mmx(blk1, blk1+1, blk2, stride, h); 00316 } 00317 static inline void sad8_y2a_mmx(uint8_t *blk1, uint8_t *blk2, int stride, int h) 00318 { 00319 sad8_2_mmx(blk1, blk1+stride, blk2, stride, h); 00320 } 00321 00322 00323 #define PIX_SAD(suf)\ 00324 static int sad8_ ## suf(void *v, uint8_t *blk2, uint8_t *blk1, int stride, int h)\ 00325 {\ 00326 assert(h==8);\ 00327 __asm__ volatile("pxor %%mm7, %%mm7 \n\t"\ 00328 "pxor %%mm6, %%mm6 \n\t":);\ 00329 \ 00330 sad8_1_ ## suf(blk1, blk2, stride, 8);\ 00331 \ 00332 return sum_ ## suf();\ 00333 }\ 00334 static int sad8_x2_ ## suf(void *v, uint8_t *blk2, uint8_t *blk1, int stride, int h)\ 00335 {\ 00336 assert(h==8);\ 00337 __asm__ volatile("pxor %%mm7, %%mm7 \n\t"\ 00338 "pxor %%mm6, %%mm6 \n\t"\ 00339 "movq %0, %%mm5 \n\t"\ 00340 :: "m"(round_tab[1]) \ 00341 );\ 00342 \ 00343 sad8_x2a_ ## suf(blk1, blk2, stride, 8);\ 00344 \ 00345 return sum_ ## suf();\ 00346 }\ 00347 \ 00348 static int sad8_y2_ ## suf(void *v, uint8_t *blk2, uint8_t *blk1, int stride, int h)\ 00349 {\ 00350 assert(h==8);\ 00351 __asm__ volatile("pxor %%mm7, %%mm7 \n\t"\ 00352 "pxor %%mm6, %%mm6 \n\t"\ 00353 "movq %0, %%mm5 \n\t"\ 00354 :: "m"(round_tab[1]) \ 00355 );\ 00356 \ 00357 sad8_y2a_ ## suf(blk1, blk2, stride, 8);\ 00358 \ 00359 return sum_ ## suf();\ 00360 }\ 00361 \ 00362 static int sad8_xy2_ ## suf(void *v, uint8_t *blk2, uint8_t *blk1, int stride, int h)\ 00363 {\ 00364 assert(h==8);\ 00365 __asm__ volatile("pxor %%mm7, %%mm7 \n\t"\ 00366 "pxor %%mm6, %%mm6 \n\t"\ 00367 ::);\ 00368 \ 00369 sad8_4_ ## suf(blk1, blk2, stride, 8);\ 00370 \ 00371 return sum_ ## suf();\ 00372 }\ 00373 \ 00374 static int sad16_ ## suf(void *v, uint8_t *blk2, uint8_t *blk1, int stride, int h)\ 00375 {\ 00376 __asm__ volatile("pxor %%mm7, %%mm7 \n\t"\ 00377 "pxor %%mm6, %%mm6 \n\t":);\ 00378 \ 00379 sad8_1_ ## suf(blk1 , blk2 , stride, h);\ 00380 sad8_1_ ## suf(blk1+8, blk2+8, stride, h);\ 00381 \ 00382 return sum_ ## suf();\ 00383 }\ 00384 static int sad16_x2_ ## suf(void *v, uint8_t *blk2, uint8_t *blk1, int stride, int h)\ 00385 {\ 00386 __asm__ volatile("pxor %%mm7, %%mm7 \n\t"\ 00387 "pxor %%mm6, %%mm6 \n\t"\ 00388 "movq %0, %%mm5 \n\t"\ 00389 :: "m"(round_tab[1]) \ 00390 );\ 00391 \ 00392 sad8_x2a_ ## suf(blk1 , blk2 , stride, h);\ 00393 sad8_x2a_ ## suf(blk1+8, blk2+8, stride, h);\ 00394 \ 00395 return sum_ ## suf();\ 00396 }\ 00397 static int sad16_y2_ ## suf(void *v, uint8_t *blk2, uint8_t *blk1, int stride, int h)\ 00398 {\ 00399 __asm__ volatile("pxor %%mm7, %%mm7 \n\t"\ 00400 "pxor %%mm6, %%mm6 \n\t"\ 00401 "movq %0, %%mm5 \n\t"\ 00402 :: "m"(round_tab[1]) \ 00403 );\ 00404 \ 00405 sad8_y2a_ ## suf(blk1 , blk2 , stride, h);\ 00406 sad8_y2a_ ## suf(blk1+8, blk2+8, stride, h);\ 00407 \ 00408 return sum_ ## suf();\ 00409 }\ 00410 static int sad16_xy2_ ## suf(void *v, uint8_t *blk2, uint8_t *blk1, int stride, int h)\ 00411 {\ 00412 __asm__ volatile("pxor %%mm7, %%mm7 \n\t"\ 00413 "pxor %%mm6, %%mm6 \n\t"\ 00414 ::);\ 00415 \ 00416 sad8_4_ ## suf(blk1 , blk2 , stride, h);\ 00417 sad8_4_ ## suf(blk1+8, blk2+8, stride, h);\ 00418 \ 00419 return sum_ ## suf();\ 00420 }\ 00421 00422 PIX_SAD(mmx) 00423 PIX_SAD(mmx2) 00424 00425 void dsputil_init_pix_mmx(DSPContext* c, AVCodecContext *avctx) 00426 { 00427 int mm_flags = av_get_cpu_flags(); 00428 00429 if (mm_flags & AV_CPU_FLAG_MMX) { 00430 c->pix_abs[0][0] = sad16_mmx; 00431 c->pix_abs[0][1] = sad16_x2_mmx; 00432 c->pix_abs[0][2] = sad16_y2_mmx; 00433 c->pix_abs[0][3] = sad16_xy2_mmx; 00434 c->pix_abs[1][0] = sad8_mmx; 00435 c->pix_abs[1][1] = sad8_x2_mmx; 00436 c->pix_abs[1][2] = sad8_y2_mmx; 00437 c->pix_abs[1][3] = sad8_xy2_mmx; 00438 00439 c->sad[0]= sad16_mmx; 00440 c->sad[1]= sad8_mmx; 00441 } 00442 if (mm_flags & AV_CPU_FLAG_MMX2) { 00443 c->pix_abs[0][0] = sad16_mmx2; 00444 c->pix_abs[1][0] = sad8_mmx2; 00445 00446 c->sad[0]= sad16_mmx2; 00447 c->sad[1]= sad8_mmx2; 00448 00449 if(!(avctx->flags & CODEC_FLAG_BITEXACT)){ 00450 c->pix_abs[0][1] = sad16_x2_mmx2; 00451 c->pix_abs[0][2] = sad16_y2_mmx2; 00452 c->pix_abs[0][3] = sad16_xy2_mmx2; 00453 c->pix_abs[1][1] = sad8_x2_mmx2; 00454 c->pix_abs[1][2] = sad8_y2_mmx2; 00455 c->pix_abs[1][3] = sad8_xy2_mmx2; 00456 } 00457 } 00458 if ((mm_flags & AV_CPU_FLAG_SSE2) && !(mm_flags & AV_CPU_FLAG_3DNOW) && avctx->codec_id != CODEC_ID_SNOW) { 00459 c->sad[0]= sad16_sse2; 00460 } 00461 }